The major power quality disturbance in a power distribution network was voltage sag and swell and voltage harmonic. New ideas, methods and techniques had been introduced by researchers to improve the quality of supply particularly at the sensitive load end. Many of these methods have their own drawbacks such as complexity, slow response and sensitivity to parameter variations. In this thesis, an improved Dynamic Voltage Restorer (DVR) topology has been designed and modeled to be used on a 415 Volts distribution network. A seven level cascaded multilevel inverter using multicarrier SPWM technique controller was proposed to handle the voltage imperfections. An innovative controller based on the Synchronous Rotating Reference Frame (SRRF) to overcome the disadvantages of the existing controller schemes by reducing the complexity, number of signal measurements and computing time has been developed. The controller was able to control the zero sequence voltage during unbalance fault period. The phase locked loop (PLL) was used to synchronize the actual and the reference voltage to provide magnitude, phase and frequency information. The switching frequency of the phase shift SPWM was low and hence, the switching loss was low with improved efficiency. The RLC interface filter value was small and was able to reduce the switching harmonics. The compensation capabilities for voltage sag, swell and voltage harmonic mitigation under various fault conditions was improved. The new DVR topology has low power consumption and high efficiency. Outline architecture of the RLC filter parameters for the specific model has been presented. The improved DVR was verified through extensive simulation using PSCAD/EMTDC. The DVR gave good control dynamics with minimum transient current overshoot. The Total Harmonic Distortion (THD) with the proposed DVR was significantly reduced to 1.72 % as compared to other traditional models and was within the IEEE Standards 519-2014. Simulation results show that the proposed model accurately detects and mitigates the various voltage disturbances. The proposed controller algorithm provides excellent voltage compensation. Since the dc source was much reduced and the interface filter, hence, the price, dimension and weightiness was significantly reduced.