When we compare the execution of a C program on a general-purpose CPU versus an FPGA, as the FPGA's superior performance, especially in parallel processing, FPGA will win the contest. Instead, this article aims to demonstrate how an FPGA implementation can outperform a specialized digital signal processor (DSP) specifically designed for signal processing tasks. This article revolves around DSPs, their definition and their optimization tactics, and we have taken as an example the DSP C6000 from the giant Texas Instrument (Texas Instrument 2017).
We chose an FIR filtering algorithm to implement it under DSP. We have proposed an optimization strategy on this DSP to make the most of the reliability of the C6000 DSPs. Then the same algorithm will be carried out and materialized under FPGA in sequential and then in parallel. The results and discussions will come at the end of this article.