Copper metallization in Integrated Circuit interconnect, poses big challenges in Semiconductor Wafer processing.  In addition to the stringent Dual Damascene requirement, the Cu material itself is prone to rapid interface diffusion as well as surface oxidation.  In production mode, a 12 hours maximum time link has been imposed between the thin Cu Seed deposition to the Cu electroplating step during interconnect depositions. This study is a preliminary attempt to validate the time link requirement through understanding the changes that take place at different times from sheet resistance perspective in the blanket Cu film. It also looks at the impact of thermal annealing on sheet resistance as a way to compare properties between natural film ageing and applying a forced condition. It is also interesting to correlate sheet resistance changes to other film properties such as reflectance and stress. This study showed the importance of bi-layer in stabilizing sheet resistance stability and the effects of ageing after Cu seed and electroplating steps.